#ifndef REG_CAP_TYPE_H_
#define REG_CAP_TYPE_H_
#include <stdint.h>

typedef struct
{
    volatile uint32_t RESERVED0[1];         //0x00
    volatile uint32_t CAP_PRE_DIV;          //0x04
    volatile uint32_t CAP_CNT_EN;           //0x08
    volatile uint32_t RESERVED1[1];         //0x0C
    volatile uint32_t INTR_MSK;             //0x10  
    volatile uint32_t INTR_CLR;             //0x14  
    volatile uint32_t INTR_STT;             //0x18  
    volatile uint32_t INTR_RAW;             //0x1C  
    volatile uint32_t CAP_CTRL[8];          //0x20 0x24 0x28 0x2c 0x30 0x34 0x38 0x3c
    volatile uint32_t CAP_COUNT[16];        //0x40 0x44 0x48 0x4C 0x50 0x54 0x58 0x5C 0x60 0x64 0x68 0x6C 0x70 0x74 0x78 0x7C
}reg_cap_t;
   
enum CAP_REG_CAP_CTRL_FIELD
{
    CAP_EN_MASK = (int)0x1,
    CAP_EN_POS = 0,
    CAP_MODE_MASK = (int)0x2,
    CAP_MODE_POS = 1,
};

enum CAP_REG_INTR_MSK_FIELD
{
    INTR_CAP1_END_MSK_MASK = (int)0x1,
    INTR_CAP1_END_MSK_POS = 0,
    INTR_CAP2_END_MSK_MASK = (int)0x2,
    INTR_CAP2_END_MSK_POS = 1,
    INTR_CAP3_END_MSK_MASK = (int)0x4,
    INTR_CAP3_END_MSK_POS = 2,
    INTR_CAP4_END_MSK_MASK = (int)0x8,
    INTR_CAP4_END_MSK_POS = 3,
    INTR_CAP5_END_MSK_MASK = (int)0x10,
    INTR_CAP5_END_MSK_POS = 4,
    INTR_CAP6_END_MSK_MASK = (int)0x20,
    INTR_CAP6_END_MSK_POS = 5,
    INTR_CAP7_END_MSK_MASK = (int)0x40,
    INTR_CAP7_END_MSK_POS = 6,
    INTR_CAP8_END_MSK_MASK = (int)0x80,
    INTR_CAP8_END_MSK_POS = 7,
    INTR_CAP1_ERR_HIGH_MSK_MASK = (int)0x100,
    INTR_CAP1_ERR_HIGH_MSK_POS = 8,
    INTR_CAP2_ERR_HIGH_MSK_MASK = (int)0x200,
    INTR_CAP2_ERR_HIGH_MSK_POS = 9,
    INTR_CAP3_ERR_HIGH_MSK_MASK = (int)0x400,
    INTR_CAP3_ERR_HIGH_MSK_POS = 10,
    INTR_CAP4_ERR_HIGH_MSK_MASK = (int)0x800,
    INTR_CAP4_ERR_HIGH_MSK_POS = 11,
    INTR_CAP5_ERR_HIGH_MSK_MASK = (int)0x1000,
    INTR_CAP5_ERR_HIGH_MSK_POS = 12,
    INTR_CAP6_ERR_HIGH_MSK_MASK = (int)0x2000,
    INTR_CAP6_ERR_HIGH_MSK_POS = 13,
    INTR_CAP7_ERR_HIGH_MSK_MASK = (int)0x4000,
    INTR_CAP7_ERR_HIGH_MSK_POS = 14,
    INTR_CAP8_ERR_HIGH_MSK_MASK = (int)0x8000,
    INTR_CAP8_ERR_HIGH_MSK_POS = 15,
    INTR_CAP1_ERR_LOW_MSK_MASK = (int)0x10000,
    INTR_CAP1_ERR_LOW_MSK_POS = 16,
    INTR_CAP2_ERR_LOW_MSK_MASK = (int)0x20000,
    INTR_CAP2_ERR_LOW_MSK_POS = 17,
    INTR_CAP3_ERR_LOW_MSK_MASK = (int)0x40000,
    INTR_CAP3_ERR_LOW_MSK_POS = 18,
    INTR_CAP4_ERR_LOW_MSK_MASK = (int)0x80000,
    INTR_CAP4_ERR_LOW_MSK_POS = 19,
    INTR_CAP5_ERR_LOW_MSK_MASK = (int)0x100000,
    INTR_CAP5_ERR_LOW_MSK_POS = 20,
    INTR_CAP6_ERR_LOW_MSK_MASK = (int)0x200000,
    INTR_CAP6_ERR_LOW_MSK_POS = 21,
    INTR_CAP7_ERR_LOW_MSK_MASK = (int)0x400000,
    INTR_CAP7_ERR_LOW_MSK_POS = 22,
    INTR_CAP8_ERR_LOW_MSK_MASK = (int)0x800000,
    INTR_CAP8_ERR_LOW_MSK_POS = 23,
};

enum CAP_REG_INTR_CLR_FIELD
{
    INTR_CAP1_END_CLR_MASK = (int)0x1,
    INTR_CAP1_END_CLR_POS = 0,
    INTR_CAP2_END_CLR_MASK = (int)0x2,
    INTR_CAP2_END_CLR_POS = 1,
    INTR_CAP3_END_CLR_MASK = (int)0x4,
    INTR_CAP3_END_CLR_POS = 2,
    INTR_CAP4_END_CLR_MASK = (int)0x8,
    INTR_CAP4_END_CLR_POS = 3,
    INTR_CAP5_END_CLR_MASK = (int)0x10,
    INTR_CAP5_END_CLR_POS = 4,
    INTR_CAP6_END_CLR_MASK = (int)0x20,
    INTR_CAP6_END_CLR_POS = 5,
    INTR_CAP7_END_CLR_MASK = (int)0x40,
    INTR_CAP7_END_CLR_POS = 6,
    INTR_CAP8_END_CLR_MASK = (int)0x80,
    INTR_CAP8_END_CLR_POS = 7,
    INTR_CAP1_ERR_HIGH_CLR_MASK = (int)0x100,
    INTR_CAP1_ERR_HIGH_CLR_POS = 8,
    INTR_CAP2_ERR_HIGH_CLR_MASK = (int)0x200,
    INTR_CAP2_ERR_HIGH_CLR_POS = 9,
    INTR_CAP3_ERR_HIGH_CLR_MASK = (int)0x400,
    INTR_CAP3_ERR_HIGH_CLR_POS = 10,
    INTR_CAP4_ERR_HIGH_CLR_MASK = (int)0x800,
    INTR_CAP4_ERR_HIGH_CLR_POS = 11,
    INTR_CAP5_ERR_HIGH_CLR_MASK = (int)0x1000,
    INTR_CAP5_ERR_HIGH_CLR_POS = 12,
    INTR_CAP6_ERR_HIGH_CLR_MASK = (int)0x2000,
    INTR_CAP6_ERR_HIGH_CLR_POS = 13,
    INTR_CAP7_ERR_HIGH_CLR_MASK = (int)0x4000,
    INTR_CAP7_ERR_HIGH_CLR_POS = 14,
    INTR_CAP8_ERR_HIGH_CLR_MASK = (int)0x8000,
    INTR_CAP8_ERR_HIGH_CLR_POS = 15,
    INTR_CAP1_ERR_LOW_CLR_MASK = (int)0x10000,
    INTR_CAP1_ERR_LOW_CLR_POS = 16,
    INTR_CAP2_ERR_LOW_CLR_MASK = (int)0x20000,
    INTR_CAP2_ERR_LOW_CLR_POS = 17,
    INTR_CAP3_ERR_LOW_CLR_MASK = (int)0x40000,
    INTR_CAP3_ERR_LOW_CLR_POS = 18,
    INTR_CAP4_ERR_LOW_CLR_MASK = (int)0x80000,
    INTR_CAP4_ERR_LOW_CLR_POS = 19,
    INTR_CAP5_ERR_LOW_CLR_MASK = (int)0x100000,
    INTR_CAP5_ERR_LOW_CLR_POS = 20,
    INTR_CAP6_ERR_LOW_CLR_MASK = (int)0x200000,
    INTR_CAP6_ERR_LOW_CLR_POS = 21,
    INTR_CAP7_ERR_LOW_CLR_MASK = (int)0x400000,
    INTR_CAP7_ERR_LOW_CLR_POS = 22,
    INTR_CAP8_ERR_LOW_CLR_MASK = (int)0x800000,
    INTR_CAP8_ERR_LOW_CLR_POS = 23,
};

enum CAP_REG_INTR_STT_FIELD
{
    INTR_CAP1_END_STT_MASK = (int)0x1,
    INTR_CAP1_END_STT_POS = 0,
    INTR_CAP2_END_STT_MASK = (int)0x2,
    INTR_CAP2_END_STT_POS = 1,
    INTR_CAP3_END_STT_MASK = (int)0x4,
    INTR_CAP3_END_STT_POS = 2,
    INTR_CAP4_END_STT_MASK = (int)0x8,
    INTR_CAP4_END_STT_POS = 3,
    INTR_CAP5_END_STT_MASK = (int)0x10,
    INTR_CAP5_END_STT_POS = 4,
    INTR_CAP6_END_STT_MASK = (int)0x20,
    INTR_CAP6_END_STT_POS = 5,
    INTR_CAP7_END_STT_MASK = (int)0x40,
    INTR_CAP7_END_STT_POS = 6,
    INTR_CAP8_END_STT_MASK = (int)0x80,
    INTR_CAP8_END_STT_POS = 7,
    INTR_CAP1_ERR_HIGH_STT_MASK = (int)0x100,
    INTR_CAP1_ERR_HIGH_STT_POS = 8,
    INTR_CAP2_ERR_HIGH_STT_MASK = (int)0x200,
    INTR_CAP2_ERR_HIGH_STT_POS = 9,
    INTR_CAP3_ERR_HIGH_STT_MASK = (int)0x400,
    INTR_CAP3_ERR_HIGH_STT_POS = 10,
    INTR_CAP4_ERR_HIGH_STT_MASK = (int)0x800,
    INTR_CAP4_ERR_HIGH_STT_POS = 11,
    INTR_CAP5_ERR_HIGH_STT_MASK = (int)0x1000,
    INTR_CAP5_ERR_HIGH_STT_POS = 12,
    INTR_CAP6_ERR_HIGH_STT_MASK = (int)0x2000,
    INTR_CAP6_ERR_HIGH_STT_POS = 13,
    INTR_CAP7_ERR_HIGH_STT_MASK = (int)0x4000,
    INTR_CAP7_ERR_HIGH_STT_POS = 14,
    INTR_CAP8_ERR_HIGH_STT_MASK = (int)0x8000,
    INTR_CAP8_ERR_HIGH_STT_POS = 15,
    INTR_CAP1_ERR_LOW_STT_MASK = (int)0x10000,
    INTR_CAP1_ERR_LOW_STT_POS = 16,
    INTR_CAP2_ERR_LOW_STT_MASK = (int)0x20000,
    INTR_CAP2_ERR_LOW_STT_POS = 17,
    INTR_CAP3_ERR_LOW_STT_MASK = (int)0x40000,
    INTR_CAP3_ERR_LOW_STT_POS = 18,
    INTR_CAP4_ERR_LOW_STT_MASK = (int)0x80000,
    INTR_CAP4_ERR_LOW_STT_POS = 19,
    INTR_CAP5_ERR_LOW_STT_MASK = (int)0x100000,
    INTR_CAP5_ERR_LOW_STT_POS = 20,
    INTR_CAP6_ERR_LOW_STT_MASK = (int)0x200000,
    INTR_CAP6_ERR_LOW_STT_POS = 21,
    INTR_CAP7_ERR_LOW_STT_MASK = (int)0x400000,
    INTR_CAP7_ERR_LOW_STT_POS = 22,
    INTR_CAP8_ERR_LOW_STT_MASK = (int)0x800000,
    INTR_CAP8_ERR_LOW_STT_POS = 23,
};

#endif 


